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Formal Verification Engineer Cambridge, East of England
Job description
Summary
Key Qualifications
- Advanced knowledge of SoC/CPU/GPU/Cellular designs, VLSI, and digital logic design and verification techniques
- Developed formal property proofs on industrial strength designs and architectures
- Deep understanding of pipeline architectures, memory/DMA controllers, out-of-order and speculative instruction execution hardware, bus interconnects, and cache coherence mechanisms
- Confirmed understanding of formal verification technologies/abstraction techniques
- Knowledge and experience in interpreting hardware specifications and using
- Temporal logic assertion-based languages such as SVA or PSL
- Experience in using EDA formal tools and tool development experience is a plus
- Proficiency in any scripting language with excellent debugging skills
- Extraordinary teammate with excellent interpersonal skills
- Passionate about developing world-class/innovative formal verification solutions
Description
Education & Experience
Additional Requirements
- This role is open in multiple locations :
- Munich, Germany
- St. Albans and Cambridge, United Kingdom
