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Job description

Role: DV- Design Verification Lead

Location: Menlo Park, CA _ Onsite work only

Hire Type: Full-Time or Contract

Keywords to search:

SV, UVM, Verification, DSP, ASIC, SRAM, DRAM, GPU, UVM,IP, SoC.

• The candidate will be part of the silicon design team chartered with delivering IP and Subsystem designs to multiple server SOCs
• 10+ years of experience
• At least 5 years in UVM
• creating a testbench from scratch by hand on at least one complex project.
• Passionate about modern AIs like ChatGPT, and willing to learn about them on the job
• Interact closely with the architecture and design teams, influencing product definition, implementation and validation. Create, define and develop system validation environment and test suites.- Responsible for the development of methodologies, execution of validation test plans, test sequences, and directed tests.
• Experience with the implementation of modern verification environments that include use of constrained-random stimulus and use of functional coverage.
• He should be able to Manage and Coordinate with the Off-shore team members

Job Types: Full-time, Contract

Salary: $73,271.57 - $160,000.00 per year

Benefits:

• Dental insurance

Schedule:

• 8 hour shift

Ability to commute/relocate:

• Menlo Park, CA: Reliably commute or planning to relocate before starting work (Required)

Willingness to travel:

• 25% (Preferred)

Work Location: In person